机械工业出版社国外电子与电气工程技术丛书数字设计:原理与实践(英文版)(第5版)/[美]约翰.F.韦克利

本书特色

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本书是数字设计领域的经典教材，是作者牢固的理论功底、严谨的学术风范与丰富的实践经验的完美融合。原理方面涵盖高级（HDL）、低级（电子电路）以及“广泛中间级”（门电路、触发器和一些较高级的数字设计构件）的多层次基础知识，更加方便不同专业的教学内容选取；实践方面专注于Verilog一种实现语言，强调基于FPGA的设计，并且添加了更多应用实例。

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内容简介

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本书是数字设计领域的经典教材，是作者牢固的理论功底、严谨的学术风范与丰富的实践经验的完美融合。原理方面涵盖不错（HDL）、低级（电子电路）以及“广泛中间级”（门电路、触发器和一些较不错的数字设计构件）的多层次基础知识，更加方便不同专业的教学内容选取；实践方面专注于Verilog一种实现语言，强调基于FPGA的设计，并且添加了更多应用实例。

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作者简介

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约翰·F. 韦克利（John F. Wakerly） 于斯坦福大学获得电子工程博士学位。他目前是思科系统公司广域网业务部主管工程项目的副总裁，还是斯坦福大学的兼职教授。他在数字设计、微型计算机体系结构、计算机可靠性等方面出版了50多部著作，并在电信与网络领域拥有13项专利。

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目录

Contents1 INTRODUCTION 11.1 About Digital Design11.2Analog versus Digital31.3Analog Signals71.4Digital Logic Signals71.5Logic Circuits and Gates91.6Software Aspects of Digital Design131.7Integrated Circuits161.8Logic Families and CMOS191.9CMOS Logic Circuits201.10Programmable Devices251.11Application-Specific ICs271.12Printed-Circuit Boards281.13Digital-Design Levels291.14The Name of the Game331.15Going Forward34Drill Problems342 NUMBER SYSTEMS AND CODES 352.1Positional Number Systems362.2Binary, Octal, and Hexadecimal Numbers372.3Binary-Decimal Conversions392.4Addition and Subtraction of Binary Numbers422.5Representation of Negative Numbers442.5.1Signed-Magnitude Representation2.5.2Complement Number Systems2.5.3Two’s-Complement Representation2.5.4Ones’-Complement Representation2.5.5Excess Representations2.6Two’s-Complement Addition and Subtraction482.6.1Addition Rules2.6.2A Graphical View2.6.3Overflow2.6.4Subtraction Rules2.6.5Two’s-Complement and Unsigned Binary Numbers2.7Ones’-Complement Addition and Subtraction522.8Binary Multiplication542.9Binary Division562.10Binary Codes for Decimal Numbers572.11Gray Code602.12Character Codes622.13Codes for Actions, Conditions, and States642.14n-Cubes and Distance662.15Codes for Detecting and Correcting Errors672.15.1Error-Detecting Codes2.15.2Error-Correcting and Multiple-Error-Detecting Codes2.15.3Hamming Codes2.15.4CRC Codes2.15.5Two-Dimensional Codes2.15.6Checksum Codes2.15.7m-out-of-n Codes2.16Codes for Transmitting and Storing Serial Data782.16.1Parallel and Serial Data2.16.2Serial Line CodesReferences82Drill Problems83Exercises853SWITCHING ALGEBRA AND COMBINATIONAL LOGIC893.1Switching Algebra913.1.1Axioms3.1.2Single-Variable Theorems3.1.3Two- and Three-Variable Theorems3.1.4n-Variable Theorems3.1.5Duality3.1.6Standard Representations of Logic Functions3.2Combinational-Circuit Analysis1043.3Combinational-Circuit Synthesis1103.3.1Circuit Descriptions and Designs3.3.2Circuit Manipulations3.3.3Combinational-Circuit Minimization3.3.4Karnaugh Maps3.4Timing Hazards1223.4.1Static Hazards3.4.2Finding Static Hazards Using Maps3.4.3Dynamic Hazards3.4.4Designing Hazard-Free CircuitsReferences126Drill Problems128Exercises1294DIGITAL DESIGN PRACTICES1334.1Documentation Standards1334.1.1Block Diagrams4.1.2Gate Symbols4.1.3Signal Names and Active Levels4.1.4Active Levels for Pins4.1.5Constant Logic Signals4.1.6Bubble-to-Bubble Logic Design4.1.7Signal Naming in HDL Models4.1.8Drawing Layout4.1.9Buses4.1.10Additional Schematic Information4.2Circuit Timing1544.2.1Timing Diagrams4.2.2Propagation Delay4.2.3Timing Specifications4.2.4Sample Timing Specifications4.2.5Timing Analysis Tools4.3HDL-Based Digital Design1654.3.1HDL History4.3.2Why HDLs?4.3.3EDA Tool Suites for HDLs4.3.4HDL-Based Design FlowReferences172Drill Problems174Exercises1765VERILOG HARDWARE DESCRIPTION LANGUAGE1775.1Verilog Models and Modules1795.2Logic System, Nets, Variables, and Constants1845.3Vectors and Operators1895.4Arrays1935.5Logical Operators and Expressions1945.6Compiler Directives1975.7Structural Models1985.8Dataflow Models2035.9Behavioral Models (Procedural Code)2055.9.1Always Statements and Blocks5.9.2Procedural Statements5.9.3Inferred Latches5.9.4Assignment Statements5.9.5begin-end Blocks5.9.6if and if-else Statements5.9.7case Statements5.9.8Looping Statements5.10Functions and Tasks2205.11The Time Dimension2245.12Simulation2255.13Test Benches2265.14Verilog Features for Sequential Logic Design2325.15Synthesis232References233Drill Problems234Exercises2356BASIC COMBINATIONAL LOGICELEMENTS2376.1Read-Only Memories (ROMs)2406.1.1ROMs and Truth Tables6.1.2Using ROMs for Arbitrary Combinational Logic Functions6.1.3FPGA Lookup Tables (LUTs)6.2Combinational PLDs2466.2.1Programmable Logic Arrays6.2.2Programmable Array Logic Devices6.3Decoding and Selecti

封面

书名:机械工业出版社国外电子与电气工程技术丛书数字设计:原理与实践(英文版)(第5版)/[美]约翰.F.韦克利

作者:[美] 约翰·F. 韦克利

页数:866

定价:¥139.0

出版社:机械工业出版社

出版日期:2017-06-01

ISBN:9787111599418

PDF电子书大小:113MB 高清扫描完整版